FFT IP Twiddle Factor

Question

I am using FFT Intel FPGA IP to generate 10bit input, 2048, streaming, natural order FFT.

Where can I find recommendations regarding effect of twiddle factor on both the

accuracy of the output and
the resource utilization of the FFT?

Thanks

kshitij_intel · Answer

Hi,The accuracy of output depends on the Pruning Scheme, please refer the below link.4. FFT Intel FPGA IPFor the resource utilization, please refer below link.1.7. Performance and Resource Utilization (intel.com)I hope it helps.Thank youKshitij Goel

kshitij_intel · Answer

Hi,As we do not receive any response from you on the previous reply that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.Thank youKshitij Goel

Forum Discussion

FFT IP Twiddle Factor

2 Replies

Recent Discussions

F-Tile Ethernet Hard IP (100G)

Cyclone® 10 GX Avalon®-ST Interface for PCI Express example Simulation

Agilex-7 AXI MCDMA for PCIe hang

Can't generate F-Tile Ethernet Hard IP Design Example

Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP Soft Reset and Hard Reset