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Altera_Forum
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7 years ago

FFT IP simulation : Warning: "sink_FIFO : scfifo" is not bound

Hello, I am trying to simulate the Intel FFT IP in ModelSim Intel FPGA Starter Edition 10.5b, and I encounter a problem : the output "sink_ready" is X as soon as the reset is deasserted, and th...
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Altera_Forum
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7 years ago

Hi Anand,

Thank you for your feedback. From your answer, I played a little bit with both tcl files, and now mine is working if I include the vsim command with all the parameters like in msim_setup.tcl : 

vsim -t ps  -L work -L work_lib -L fft_ii_0 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cyclonev_ver -L cyclonev_hssi_ver -L cyclonev_pcie_hip_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cyclonev fft_tb

Before I was doing it with the GUI and only my testbench was included in the parameters of vsim.

Thanks,

Jérôme