FFT IP core and QSYS

The FFT is Avalon ST compliance, this is depending on your application to determine how to connect the FFT IP, do you need store data in External Memory? if no, then I don't think you need SGDMA. Or you may just export the avalon ST port to the top level

I solved it. I wrapped Megacore code with a template and used scgdma with some adapters.

hi，i also use fft ip and connect it to nios through sgdma. however, i load to the development kit and the result is not correct.

module my_fft (
    clk,
    reset_n,
    sink_valid,
    sink_sop,
    sink_eop,
    sink_in,
    sink_error,
    in_empty,
    
    source_ready,
    sink_ready,
    source_error,
    source_sop,
    source_eop,
    source_valid,
    source_out,
    out_empty);
    
    input        clk;
    input        reset_n;
    input        sink_valid;
    input        sink_sop;
    input        sink_eop;
    input        sink_in;
    input        sink_error;
    input  in_empty;
    
    input        source_ready;
    output        sink_ready;
    output        source_error;
    output        source_sop;
    output        source_eop;
    output        source_valid;
    output        source_out;
    output      out_empty;
    
    
    
    wire  sink_real;
    wire  sink_imag;
    wire  source_real;
    wire  source_imag;
    wire  source_exp;
    
    assign {sink_real,sink_imag} = sink_in;
    assign source_out = {source_real,source_imag};
    assign out_empty = (source_eop)?2'b0:2'b0;
    
    fft512 fft512_int(
        .clk(clk),
    .reset_n(reset_n),
    .inverse(1'b0),      //use fft
    .sink_valid(sink_valid),
    .sink_sop(sink_sop),
    .sink_eop(sink_eop),
    .sink_real(sink_real),
    .sink_imag(sink_imag),
    .sink_error(sink_error),
    .source_ready(source_ready),
    .sink_ready(sink_ready),
    .source_error(source_error),
    .source_sop(source_sop),
    .source_eop(source_eop),
    .source_valid(source_valid),
    .source_exp(source_exp),         //not used
    .source_real(source_real),
    .source_imag(source_imag)
                    );
    
        
    
endmodule

hi，i also use fft ip and connect it to nios through sgdma. however, i load to the development kit and the result is not correct.

module my_fft (
    clk,
    reset_n,
    sink_valid,
    sink_sop,
    sink_eop,
    sink_in,
    sink_error,
    in_empty,
    
    source_ready,
    sink_ready,
    source_error,
    source_sop,
    source_eop,
    source_valid,
    source_out,
    out_empty);
    
    input        clk;
    input        reset_n;
    input        sink_valid;
    input        sink_sop;
    input        sink_eop;
    input        sink_in;
    input        sink_error;
    input  in_empty;
    
    input        source_ready;
    output        sink_ready;
    output        source_error;
    output        source_sop;
    output        source_eop;
    output        source_valid;
    output        source_out;
    output      out_empty;
    
    
    
    wire  sink_real;
    wire  sink_imag;
    wire  source_real;
    wire  source_imag;
    wire  source_exp;
    
    assign {sink_real,sink_imag} = sink_in;
    assign source_out = {source_real,source_imag};
    assign out_empty = (source_eop)?2'b0:2'b0;
    
    fft512 fft512_int(
        .clk(clk),
    .reset_n(reset_n),
    .inverse(1'b0),      //use fft
    .sink_valid(sink_valid),
    .sink_sop(sink_sop),
    .sink_eop(sink_eop),
    .sink_real(sink_real),
    .sink_imag(sink_imag),
    .sink_error(sink_error),
    .source_ready(source_ready),
    .sink_ready(sink_ready),
    .source_error(source_error),
    .source_sop(source_sop),
    .source_eop(source_eop),
    .source_valid(source_valid),
    .source_exp(source_exp),         //not used
    .source_real(source_real),
    .source_imag(source_imag)
                    );
    
        
    
endmodule