Forum Discussion
omerc
New Contributor
4 years agoFFT Intel FPGA IP (altera_fft_ii) unexpected source error (missing sop)
Dear Intel FPGA community members,
I am getting a strange error from the Intel FFT FPGA IP. The waveform from Signal Tap Logic analyzer is below:
I am raising the sink_valid and sink_so...
omerc
New Contributor
3 years agoone more update: if I change the FFT parameters to be <fixed_point>, <variable streaming> instead of <block floating point>, <streaming>, it does not generate the error with all the same timing and signals.
But my desired implementation is Block floating point still, so this is to find some more hint about what could have gone wrong.
I appreciate if you can help with the problem.
Best Regards,
Ömer.