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Altera_Forum's avatar
Altera_Forum
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14 years ago

FFT Frequency Range

I am using the 50MHz internal clock of the Stratix III to collect samples of a chirp signal operating at 30kHz to 80kHz. I read in one of the forums that the FFT MegaCore output frequencies are 0~Fs...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Ok, I think my problem is solely with SignalTap. I use a PLL to slow the FFT clock, and I believe it is working fine. However, no matter what I do with the SignalTap clock, it still seems to sample and 50MHz. I tried using a clock_derived, but it just freezes during data acquisition. Could there be something wrong with my clock_derived pin assignment (or lack thereof)? Do I have to manually assign the clock_derived to a pin on the FPGA?