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RVanD5's avatar
RVanD5
Icon for New Contributor rankNew Contributor
7 years ago

FFT Core - Variable streaming floating point - Arria 10. Output SOP and EOP are not aligned.

We are having trouble with the migration of the fixed point FFT core to the floating point FFT core on Arria 10. On example of strange behavior is seen in the the SignalTap below: the SOP en EOP mark...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

As I understand, it you are having some inquiries related to the A10 FFT IP core. Specific to your initial observation where the SOP and EOP not aligned with the valid signal. S​orry for the any confusion, would you mind to further pin point ie with some illustration on the screenshot to show the specific location of the not align? thank you very much.

By the way, if you are referring to SOP/EOP not assert/de-assert together with valid signal, there should be no issue with this. Only those SOP/EOP that assert during the assertion of valid signal, will be valid.

I believe we will need to further look into your second observation where the last EOP is not streamed out by the core. Just would like to check with you if you have had any chance to try the following:

  1. Try with 2 x 4096 samples to see if similar issue occurs? Just to isolate any data packet number dependencies.
  2. Just would like to check with you if you have had any chance to try with the example design generated by the IP core to see if similar issue occur?

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin