Hello Ankit,
The i_tx_mac_inframe signal segmented client interface is a bit vector (e.g., [15:0]) that marks which segments of the i_tx_mac_data bus contain valid data in the current clock cycle. Its transitions across cycles, together with its bit pattern, allow you to identify the Start of Packet (SOP) and End of Packet (EOP) locations.
SOP, detected by a transition from all zeros to a non-zero value in i_tx_mac_inframe. The lowest set bit in i_tx_mac_inframe marks the location of the SOP in the data segments.
EOP, detected by a transition from a non-zero value to all zeros in i_tx_mac_inframe. The highest set bit in i_tx_mac_inframe marks the location of the EOP in the data segments.
For example,
SOP:
- Cycle N-1: i_tx_mac_inframe = 16'h0000
- Cycle N: i_tx_mac_inframe = 16'h00FF
- Interpretation: The change from all zeros to 16'h00FF means a new packet starts at cycle N. The lowest set bit in 16'h00FF (bit 0) marks the start of the packet in the segment.
EOP
- Cycle N: i_tx_mac_inframe = 16'h00FF
- Cycle N+1: i_tx_mac_inframe = 16'h0000
- Interpretation: The change from 16'h00FF to all zeros means the packet ends at cycle N. The highest set bit in 16'h00FF (bit 7 if only lower byte is used) marks the end of the packet in the segment.
how to interpret i_tx_mac_data signals if i_tx_mac_valid == 1'b1 and i_tx_mac_inframe [15:0] == 16'h0 ?
- If i_tx_mac_valid is asserted (1'b1), but i_tx_mac_inframe is all zeros (16'h0), this means the interface is active/ready, but there is no valid packet data in the current cycle.
- The i_tx_mac_data signals should be ignored in this cycle—they do not contain valid data.
- This can occur during inter-packet gaps or when the MAC is otherwise idle.
Hope this helps.
Regards,
Pavee
Occasional Contributor
