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GStre's avatar
GStre
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Exported MSI conduit on A10 PCIe AVMM IP is non-functional

The A10 PCIe IP core allows you to export msi interrupt signals, msi_interface[81:0] and msi_control[15:0]. These signals are described in UG-01145_AVMM document and are required if you are going to ...
  • GStre's avatar
    GStre
    5 years ago

    KhaiY,

    I'm sorry, due to ITAR, IP and other matters, this design cannot be shared. Although it's easy enough to put together your own simple design. The fact is, the MSI conduit interface simulates properly in version 18.1, it's the actual hardware that don't work. Another interesting fact is that in earlier versions of Quartus the MSI conduit simulation did not work, which back then, when you could, I pulled a Altera ticket. So I'm not surprised to see the hardware non-functional.

KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


It's glad to hear that the MSI conduit is working now.

From your previous reply, it seems like the problem is on the application code of the interrupt handler. Could you share more details about the fix? Is it only disconnecting the MSI conduit from the interrupt handler?


Thanks

Best regards,

KhaiY


GStre's avatar
GStre
Icon for New Contributor rankNew Contributor
5 years ago

I disagree, the problem is with the compilation of the machine generated code in the Qsys Platform designer block. The notion that the conduit interface would break-down on some user interface dependency is garbage. I essentially did nothing to fix this interface other than add a few registers and re-complied it again. It failed once and I expect it to fail again in future builds.