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HBhat2's avatar
HBhat2
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6 years ago

Experiment with S-10 Transceiver IO Terminations

Hi, I am performing some experiment with S-10 SoC Dev kit (L-tile). I am using FMC loopback cards to check the behavior of SERDES so as to use for my final requirement. My goal is to connect a dev...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi HPB,

Thanks for your update. Glad to hear that by setting the slew rate to the highest is helping to improve the BER in your board setup. I understand that the existing impedance mismatch is due to the devkit trace impedance. Please note that in your final board implementation, it is still recommended ensure impedance matching with trace impedance and TX/RX OCT.

Thank you.

HBhat2's avatar
HBhat2
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6 years ago

Hi,

<Glad to hear that by setting the slew rate to the highest is helping to improve the BER in your board setup>

This is Stratix 10 SoC Dev kit (L-tile ) and FMC loopback card setup

<Please note that in your final board implementation, it is still recommended ensure impedance matching with trace impedance and TX/RX OCT>

Yes. It is understood clearly.

Thank you..

With regards,

HPB