Forum Discussion
hareesh
Frequent Contributor
3 years agoHi,
this one is following intel espi spec basically
you can refer to above link 5.1 Cycle Types and Packet Format for more information
Thanks,
WFitt
New Contributor
3 years agoThank you, In the meantime I have solved this problem.
This would have been the answer that I needed:
In the PCTXFIFO must be written (example):
- Byte 1: 0Fh (cycle type)
- Byte 2: 00h (length MSB)
- Byte 3: 01h (length LSB)
- Byte 4: 55h (Data)
Exactly this bytes I wrote in the FIFO.
I would have enjoyed your confirmation that I was right.
My problem was caused by my VHDL code reading the PCRXFIFO.
Now it works fine.
Regards
Wolfram