Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Error: WYSIWYG RAM primitive "ram_block1a0" must have Port A, Data In port or paramet

I've got this error after generating SOPC system. --- Quote Start --- Error: WYSIWYG RAM primitive "ram_block1a0" must have Port A, Data In port or parameter specified --- Quote...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

hi,

I had the same problem after I changed the clock domain. then I found out that I didn't connect the new clock to the module. after connecting that, the problem solved. generally this error causes when you didn't connect the clock signals properly.

thanks,

Aidin.