Error: WYSIWYG RAM primitive "ram_block1a0" must have Port A, Data In port or paramet

This error usually means that an input port on a ram block is not connected correctly. The error info is atrocious.

1. If you have more than 1 ram block, delete all but 1, maybe just Gen Functional net list to check for error, (Should be quicker than compile, either should work)

2. Look very carefully at the input connections. For instance not having an enable connected will generate an error for every data inut.

Good Luck All!