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HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
5 years ago

Electrical IDLE entry & exit detection on receiver side of the transceiver

Hi, I am working on Arria 10 Transceiver for a custom protocol and I need to put the transmitter in electrical IDLE as per the protocol. On the transmitter side, I can put transmitter in electrica...
HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
5 years ago

Hi,

"

I understand that whenever transmitter is active both lock to data & lock to ref are asserted (1). Whenever the transmitter goes into electrical IDLE, the lock to data status in the corresponding receiver in the other side goes low (de-asserted) and receiver will continue to lock to ref only. Whenever the linked transmitter exits electrical IDLE, the CDR status of the receiver (lock to data) asserted again.

"

That means above understanding is correct & based on lock to data de-assertion & assertion, I can arrive at the conclusion that corresponding TX is in IDLE or not. [Apart from some delay to assert & de-assert the status]

With regards,

HPB

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago
Hi HPB, Just would like to further clarify on the behavior lock-to-data and lock-to-ref signals: "I understand that whenever transmitter is active both lock to data & lock to ref are asserted (1)." [CP] When transmitter is active and valid data present at the RX, the CDR will achieve LTD mode. The lock-to-data signal will be High. The lock-to-ref signal can be ignored (it may stay at High or toggling) "Whenever the transmitter goes into electrical IDLE, the lock to data status in the corresponding receiver in the other side goes low (de-asserted) and receiver will continue to lock to ref only." [CP] When there is no valid data present at the RX, the lock-to-data and lock-to-ref signals will be toggling. Please let me know if there is any concern. Thank you. Best regards, Chee Pin