Forum Discussion
MichaelB
Occasional Contributor
5 years agoE-Tile TX/RX out clock constraint
Hi,
I've defined a data rate in my E-Tile IP and I want to switch the data rate using the E-Tile Avalon reconfiguration interface by setting the internal PLL multiplier.
Now I have chosen the ...
- 5 years ago
Michael,
Apologize for the late reply on this. You can try to refer to the following UG to find some of the E-Tile hard IP example designs which were validated by engineering.
See if it is helpful.
KennyT_altera
Super Contributor
5 years agoWhat device that you were using?
What you need to do is create clock at the port and use derive_pll_clocks to generate the correct output clocks.
You can also open up timing analyzer to put the derive_pll_clocks inside the tcl command. It will show you a list of generated clock inside.
Btw, if you want to change to different clock unit. Here is the command:
set_time_format -unit ns -decimal_places 3