Forum Discussion

kokodo's avatar
kokodo
Icon for New Contributor rankNew Contributor
2 years ago
Solved

E-Tile Transceiver Native PHY Intel Agilex FPGA IP refclk error

Hello, I would like to use PIN_CE18 for E-TILE transceiver 156.25M reference clock input,but these error messages appear.I have tried using a iopll fpga ip out clock as a reference clock,it made a s...
Ethernet
  • Kshitij_Intel's avatar
    Kshitij_Intel
    2 years ago

    Hi,


    As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    Thank you,

    Kshitij Goel


Kshitij_Intel's avatar
Kshitij_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi,


As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Thank you,

Kshitij Goel