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HBhat2's avatar
HBhat2
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5 years ago

Dynamically Switching the lane number for Displayport using Displayport IP

Hi, I am targeting Arria 10 FPGA with Displayport IP. My Display-port Interface is with Type-C connectors ALT mode (not using Standard DP connector). When I use Type-C connector, we can have Flip c...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi HPB,

It's possible to perform lane swapping but it's not done automatically.

Meaning user needs to manually manipulate the mapping on "tx_parallel_data" and "rx_parallel_data" connection between DP IP and NativePHY IP.

You can take a look on the same design example doc (page 10, page 11) where the design example use special parameter to control the different lane connection between different Bitec daughter card.

Thanks.

Regards,

dlim

HBhat2's avatar
HBhat2
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5 years ago

Hi @DeshiL_Intel​ ,

Yes, I am aware that statically we can swap the lanes since we can assign the pin outs based on the hardware lane configuration.

In the Displayport IP user guide, page 92, Figure 29. Source Clock Tree

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_displayport.pdf

I can see that SYNC submodule of Encoder is going to interface to Transceiver Channel HSSIO0/1/2/3. If I write a custom logic ( data mux) to swap lane-0 data to Lane-4, lane-1 data to lane-2 and vice versa, based on Type-C cable orientation, whether the design will work properly?

Whether the Master channel concept wrt Transmit Bonding will have any effect on this dynamic switching?

With Regards,

HPB