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Altera_Forum's avatar
Altera_Forum
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9 years ago

Dynamic Partial Reconfiguration on Stratix V

Hello everyone, I want to dynamic reconfigure a partition of my design. I have followed these steps so far: a) make a revision of my project and assign the different personas for each revi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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I would prefer a mif file, the format is very easy.

A simple Matlab example is shown here, this could be easily ported to C, tcl, ...

http://www.alteraforum.com/forum/showthread.php?t=27934

You can also use srec_cat from the srecord Tools:

srec_cat dummy.rbf -binary -o dummy.mif -Memory_Initialization_File

I don't know if Altera provides a Tool for this simple task. I would use a small tcl loop, which can be easily started automatically during the build.

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I have a Stratix V GX Transceiver Development Kit. This board has a MAX CPLD device to configure the FPGA from a flash memory. As far I know the PFL (Parallel Flash Loader) IP does not support .rbf files. Do you know how can I implement the DPR from the flash memory? Any ideas?

Thanks a lot for you help.

Onoufrios