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Hi Onoufrios,
did you already managed to convert .msf abd .sof to the partial rbf files?
This is how i do within a POST_FLOW_SCRIPT_FILE:
set path "output_files"
set binaries "${path}/rbf"
file mkdir ${binaries}
set start_point x40y2
run_cmd "quartus_cpf
-p $path/${revision}.${start_point}.msf
$path/${revision}.sof
$path/${revision}.${start_point}.pmsf"
set options ""# lappend options "-o use_scrub=on"# lappend options "-o enhanced_bitstream_compression=on"# lappend options "-o bitstream_decompression_during_pr=on"
set target_file "$binaries/${revision}.${start_point}.rbf"
run_cmd "quartus_cpf
-c $path/${revision}.${start_point}.pmsf
${target_file}"
The PR IP has two Registers, PR_CSR and PR_DATA.
- set PR_CSR to 0x1 (start single clock PR)
- copy partial rbf to if->PR_DATA register
I guess you know this document already:
https://www.altera.com/en_us/pdfs/literature/ug/ug-partrecon.pdf Additionally you need at least for CycloneV an extra PR license and you have to enable PR in quartus.ini. Don't know about StratixV.
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Thanks for your answer.
I am aware of this document you referred. I have the extra license for Stratix V for partial reconfiguration.
No, I haven't yet extracted the .sof/.msf/.rbf files yet because I first need to understand how to interact with the PR IP.
From your answer I understood that I need to make a ROM to store the rbf file (inside the FPGA) and a parser to feed the the PR IP along with the PR_CSR register (timings are depicted in the doc above).
An another question I have is: should I create a wrapper entity that will freeze all internal/external signals around my re-configurable entity? I only use one persona.
Honored Contributor
