Honored Contributor
Honored ContributorHi,
--- Quote Start --- 1. Does <Avalon-MM Arria V hard HD IP for PCIe> include the PHY IP Core? Need I add the additional PHY IP Core for <Avalon-MM Arria V hard HD IP for PCIe>? --- Quote End --- Yes, Avalon-MM Arria V hard HD IP for PCIe include the PHY IP Core, Refer page No:12 or Configurations session of below link. https://www.altera.com/en_us/pdfs/literature/ug/ug_a5_pcie_avmm.pdf --- Quote Start --- 2. In the top-level entity of PHY IP Core of PCIe, which signals are for differential couples? How should I do pin-assignment for the differential? --- Quote End --- Check the development kit user guide for pin details or design example for more information. Refer page No 37. https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/rm_avgx_starter_board.pdf Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
