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Michael2021's avatar
Michael2021
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

DisplayPort at non GPU mode on Cyclone 10 GX and Quartus pro 20.1

I tried to finalize design non GPU mode. doesn't provide non GPU mode example design. I can't figure it out how to connection Transceiver Native PHY Reconfiguration interface signal ( this signal i...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,


This is bad.


Clkusr pin connection is a must as FPGA power up transceiver calibration process can't be skipped.

  • If transceiver channel is not calibrated correctly then it may affect the functionality later


I suggest you to rework your board to ensure there is proper clocking to clkusr pin.


Thanks.


Regards,

dlim


  • Michael2021's avatar
    Michael2021
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Ok, I understood.

    The calibration process means internally storing some offset value.

    Normally if the calibration doesn't work or can't be calculated, then default value is lorded and exited

    But This case never can make it to work.

    If the clock connect to there , then this is not failure decision (never can't make it to work) . Is it right ?

    I don't want to go back to use Arria V GX

    I saw there is triggering calibration bit. Is this bit to skip calibration process ?

    Thank you

    Michael