Forum Discussion

Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Debugging PCIe DMA transfer example design

Hi, I would like to have your continued support on this thread. Unfortunately this ticket got closed https://community.intel.com/t5/FPGA-Intellectual-Property/A-design-based-on-the-PCIe-DMA-transfe...
Pcie
VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi @Sijith,


Do you have any updates from the previous reply?


Thanks.

Best Regards,

VenTingT


Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi VenTing,

Actually I am working on the DDR4 example design and anticipate a couple more days to finish. Would like to update you on this.

About your previous reply,

1) Yes I was referring to 'Demonstrations/PCIe_SW_KIT/Windows/PCIe_DDR4/PCIE_DDR4.cpp. Will just compiling this code will update the driver or I have to do something more. May I know which is the best place to ask question regarding the Driver modifications (Do you have experts providing support on the API drivers too?) for this example design?

2) In Chapter 7.3, the PCIe library module TERASIC_PCIE_AVMM.dll provides DMA and direct I/O access for user application program to communicate with FPGA. Users can develop their applications based on this DLL.

I thought by disabling the writing part of API (PCIE_DmaWrite) in the `PCIE_DDR4.cpp.` file will do the work as it qualifies the description under `Chapter 7.3`. But not sure how to to modify the driver to initiate the DMA from the FPGA side. Any suggestion will be highly appreciated.

Thank you very much

Regards

SE