Debugging PCIe DMA transfer example design

Hi @Sijith,

Could you please run the DMA read test to verify that the host can read the correct data written to the FIFO?

Also, please check my previous reply here. Usually, FIFO is used to buffer data streams and manage differences in data processing rates.

https://community.intel.com/t5/FPGA-Intellectual-Property/A-design-based-on-the-PCIe-DMA-transfer-example-design-for-Arria/m-p/1564164/highlight/true#M28507

Thanks.

Best Regards,

VenTingT