mfortunaNew Contributor1 month agoDDR4 Problem Migrating from Arria 10 016 to 048 We have a board design that supports an F29 package Arria 10. It has two DDR4 interfaces running at an 1866 data rate. In the past an 016 chip with DDR4-2400 ICs worked fine. We needed more logic s...Show More
Recent DiscussionsAgilex 7 I F-Tile Direct PHY: example TB doesn't workSolvedCyclone V CAN triple samplingWhy the Error Response Slave IP cannot work for Agilex 5 SOC FPGA?About the System PLL in Agilex 5Agilex 7 F-Tile 200G hard IP de-feature clarification