Forum Discussion
anonimcs
Contributor
2 years agoDDR4 EMIF IP Inquiry for Arria 10
Dear A10 DDR4 EMIF IP Owners, I have a design on Quartus 21.3 Pro and I noticed that the External Memory Interface IP for DDR4 memory has some timing violations within the IP core. I would expect th...
AdzimZM_Altera
Regular Contributor
2 years agoHi
Can you provide a design to replicate this issue?
Regards,
Adzim
- anonimcs2 years ago
Contributor
Hi @AdzimZM_Intel ,
I can provide the project archive, but you'll need to send me a link via email to upload the archive files to Intel's portal as they exceed the file upload limit to the forums (which is 71 MB but the archive files are more than 100 MB)
Looking forward to hearing from you,
Kind regards,