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anonimcs's avatar
anonimcs
Icon for Contributor rankContributor
2 years ago

DDR4 EMIF IP Inquiry for Arria 10

Dear A10 DDR4 EMIF IP Owners, I have a design on Quartus 21.3 Pro and I noticed that the External Memory Interface IP for DDR4 memory has some timing violations within the IP core. I would expect th...
Memory
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


May I know what is the timing violation of the design?

Can you provide the DDR4 timing report from the Timing Analyzer report?



Regards,

Adzim