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Altera_Forum
Honored Contributor
9 years agoDDR3 memory controller Termination calibration error.
Hi, I am using DDR3 memory controller generated with UniPhy IP core, for Cyclone V device. I have selected 'No sharing' mode for OCT sharing option. Also connected oct_rzqin port to the input p...
Altera_Forum
Honored Contributor
9 years agoI'm not sure what you mean by a "pin lock constraint" (a pin assignment in the Pin Planner?). In any case, if you make a pin assignment for the OCT, it must be to one of the dedicated RZQIN pins of your particular target device. Check your device's handbook to see which dedicated pins are available for this function or do a pin search in the Pin Planner.