DDR3 functional simulation using Questa Sim failed

Hi All,

I meet with a strange issue that when I did the RTL simulation using Questa Sim in the example project generated by DDR3 IP core, it worked well; but if I simulated the same function in my own project, it was failed with an error: use of reserved cas latency code : 000.

All of the settings are the same, and this error seems to be related to the mem_model.sv file. Is there any one troubling with this issue too?