DDR2 reading errors on last two words

Yes, I try the example driver.

And with it, I see a lot of differences between write datas and read back datas in signal tap II. But the test complete signal goes high after reading pattern back so I think errors I see are just a display bug from signal tap.

But there is one difference between the example driver "errors" and mines. Because with the provided driver, when read back datas are not equal to write datas, just some bits in the word are different.

And with my driver, when I read back a bad word, the word is fill up with 00's and FF's (randomly). I don't know why...

Note that I reuse the working example design, remove the example driver and put mine. So configuration of ddr ip is the same (pinout, terminations...).

Thanks for your further help!

Edit: I've checked the example driver and the test complete signal who tell that all reading datas back are ok is not going high at all the time. One time is goes high, another time not. Maybe 50% of fault test. But in both of case, I've got differences between write and read datas! Any help would be appreciated!