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Altera_Forum
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17 years ago

DDR2 HP Controller Simulation

Hi, I'm trying to simulate the DDR2 HP SDRAM controller in conjunction with a Hynix DDR2 memory model. As I'm developing in vhdl I compile the following auto generated files for the controller:...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Hi ddtehlert,

Add rigth propagation delays to CK, DQS and command pins (cas, ras, wen). Does hynyx model report any violations?