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Altera_Forum
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8 years ago

DDR2 Fitter(Place & Route) report errors

The FPGA is Cyclone IV EP4CE30F23C7, FBGA484-7 And ddr2 parameters are as follow: https://alteraforum.com/forum/attachment.php?attachmentid=14289&stc=1 https://www.alteraforum.com/forum/atta...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Another way is to remove all pin location assignment for DDR2 pin and perform full compilation. Quartus will auto fit those pin accordingly that apply with the requirement. Then review the fitter report and compare it to your manual pin assignment.

The fastest way is if the auto fitting location meeting your requirement, then you can eliminate your original pin location and use this new pin location.

(This message was posted on behalf of Intel Corporation)