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Altera_Forum's avatar
Altera_Forum
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19 years ago

DDR Simulation

Hi Forumees, Anyone have any experience simulating the verilog model of the DDR SDRAM Controller in modelsim? I am trying to use the following command - # compile the encrypted ddr co...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

create a new project and then simulate it will work, its not working in present is due to core is not generated or some conflict in accessing the controller