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Altera_Forum
Honored Contributor
Honored ContributorDDR interface that spans multiple sides of the device
I recently wanted to create a 144-bit DDR2 interface that would span across the top and bottom of a Stratix II device. The Altera MegaWizard allows you to do this but that probably isn't the best wa...
Altera_ForumHonored Contributor
Honored ContributorWow this is great information obviously you have some experience with DDR. I implemented a DDR core in the past and had a really difficult time meeting timing. Part of the problem was that the tcl scripts were difficult to use that the megacore generated. I have read a little about the new DDR timing wizard. Will this make timing closure easier?
