Well that was my plan, I would make Avalon-ST streaming source adapter to interface my logic to Avalon-ST bus, then stream the data through that bus. Now I don't know how can I have a full ethernet support:
1) Connect my streaming source adapter and nios-to-tse adapter to multiplexer (the one from offload example) then connect that multiplexer to the TSE core (this is my main idea). This should multiplex the data between my data and Nios. However I am not sure, but I may face another problem: the incoming data is a stream, which I can't stop anytime I want except if I place FIFO between the MUX and adapter.
2) Connect my streaming source adapter to DMA, that has shared memory with TSE core, so it can stream the data to the memory through DMA and pick up that data from DMA in Nios. Then place it to InterNiche buffer (I still did not manage to find where it is, yet)
I can't use only hardware implementation. If I understood correctly - I need to instantiate TSE core in logic without Nios? Then it's a no-go :(, I need ARP and ICMP support now and maybe additional options later.