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steve_stl_01's avatar
steve_stl_01
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7 years ago

Cyclone V Avalon-MM Interface for PCIe Root Port Questions

I have some questions with regards to the use of the Cyclone V Avalon-MM Interface for PCIe, used as a root port. I have a pretty good understanding of PCIe. I have implemented PCIe endpoints in FPG...
steve_stl_01's avatar
steve_stl_01
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7 years ago

Thanks for the link to a newer Cyclone V PCIe Root Port Rocket Boards project. I did not realize there was a newer version. I had been working with the older version (built with Quartus II v15.0.1). For others' reference:

https://rocketboards.org/foswiki/Projects/PCIeRootPortWithMSI

Based on the short amount of time I have been looking at the new project documentation, it looks like I will need to look at the HPS driver for information on how to enumerate the endpoint on the root complex. (The PCIe root port's CRA Avalon-MM slave interface is connected to the lightweight HPS-to-FPGA Avalon-MM master interface.) According to the project documentation, the CRA Avalon-MM slave interface is used to send configuration TLPs.