Cyclone IV GX transceiver kit not detected by linux host
I have followed the following steps:
[1] load and synthesize the chaining DMA example that uses PCIE hard IP
[2] program the sof file into my Cyclone IV GX FPGA
[3] open virtual box and do a lspci
I'm attaching the entire project. The chaining DMA example project (which makes use of the PCIE hard IP core) can be located here:
/pciex_mgwz/pciex_mgwx_examples/chaining_dma/pciex_mgwx_example_chaining_top.qpf
My questions:
[q1] Why can't I see my EndPoint listed when I use the lspcie command?
[q2] The pin assignments made in the project doesn't seem to line up with the pin locations and functions described in the Cyclone IV GX transceiver board pdf (except for the pcie signals: pcie_clk, tx0,rx0)
Please help me. I'm struggling with this stupid design for almost 6 months.
My overall objective is to transfer "DEADBEEF" from my host to my EP and look at it in SignalTap in my FPGA. I also need PCIe driver on my host machine. Learning this is very important for me. If you can personally walk me through all the steps I don't even mind paying for that service.....I'm just fed up at this point.
Any (I mean Any) help truly truly appreciated