Cyclone 10 DDR3 Address Pin assignment
Hello,
we have a design with a Cyclone 10 GX, we are using a hard DDR3 controller.
After an early pin placement, the PCB guys asked us to swap some pins (ddr_dq data, ddr_dm and ddr_a).
no problem with ddr_dq data and dm, but when i tried to swap some address pin the fitter raises an error saying something like:
Error(13135): Address/command pin (ddr3_a[0]) is constrained to an illegal location (PIN_B19). The legal location for this pin is PIN_A19
when i set again the pin to A19 the compiler runs without any error
i cant understand why Quartus is complaining about that, maybe this is still written in some file, i searched all the files in the project folder but without success.
All went fine with ddr_dq and ddr_dm changes
Any idea of why this is happening?
Andrea