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RicardoC's avatar
RicardoC
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

CXL Type 3 Design Example 1.81 simulation issue

Hi, The version 1.81 of the Design Example of the CXL Type 3, using Quartus 23.1 source files, does not behave as intended. The testbench supposedly issues MemWrites of 1500 cache lines, and reads t...
Cxl
JonWay_C_Intel's avatar
JonWay_C_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi there,

Can you also share the sim logs for 1.7 version of the Design Example using the Quartus 22.4 source code works correctly?

I spoke with the FAE. Can you also attach the modified tb/tests/cxl_base_test.sv, so we can understand how the failing MACRO was disabled?

Thanks.