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Altera_Forum's avatar
Altera_Forum
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13 years ago

CVI and vid_datavalid at separate syncs

Hi to all of you, I#m trying to bring up a self-made board. I have an Cyclone IV E. The FPGA is used only for Chroma Resampling from 4:4:4 to 4:2:2. At the moment I try to use an Tes...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi to all, I got a working solution which maybe is interessting for somebody.

I selectet the incoming Video Data-Siganls and put it on an OR-Logic the I putvthe Output of the OR-Logic to the vid_datavalid input. It works for all Signals, because I have only a Signal if one of the datasignals is available.