Forum Discussion
Altera_Forum
Honored Contributor
12 years agoDears, i found answer from Altera's website(see link below). It said it's a bug of quartus ii of earlier version than 12.1. And users can ignore these 2 warnings.
http://www.altera.com/support/kdb/solutions/rd08152012_590.html?gsa_pos=2&wt.oss_r=1&wt.oss=verilog%20hdl%20warning%20at%20the%20port%20and%20data%20declarations%20for%20array%20port%20do%20not%20specify%20the%20same%20range%20for%20each%20dimension