Forum Discussion
Altera_Forum
Honored Contributor
14 years agoDDR, DDR2 and DDR3 memory devices has to be interfaced to special (dedicated) FPGA pins. Run Pin Planner and enable showing of DQ/DQS groups - You'll see which pins can be used as data pins, which pins must be DQS, etc... Also some banks are capable of faster rates, some are not, but I am not sure about Arria II, since I use Cyclone III.