Connecting an 8-bit peripheral to a 32-bit avalon bus

Boris thanks for responding. Okay, now why do I need 2 bits for byte enable? I have the following code for the writing of internal 8-bit registers using just 3 bits of the address for the write and just one byte for the write data register :

// avalon signals

input clk; // master clock input

input reset_n; // asynchronous reset

input [2:0] address; // lower address bits

output [7:0] writedata; // databus output

input wr; // write input

input rd; // read input

reg [7:0] writedata;

always @(posedge clk)

begin

//if (~wr & rd)

if (wr & ~rd)

case (address) // synopsys parallel_case

3'b000: writedata <=# 1 prer[ 7:0];

3'b001: writedata <=# 1 prer[15:8];

3'b010: writedata <=# 1 ctr;

3'b011: writedata <=# 1 rxr; // write is transmit register (txr)

3'b100: writedata <=# 1 sr; // write is command register (cr)

3'b101: writedata <=# 1 txr;

3'b110: writedata <=# 1 cr;

3'b111: writedata <=# 1 0; // reserved

endcase

end