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rkv's avatar
rkv
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5 years ago

COMPLETION TIMEOUT CONFIGURATION IN P-TILE AVMM IP FOR PCIE

I want to configure the completion timeout value of P-tile AVMM IP for PCIe. I didn't see any option to do so in the IP. Can anyone help me out with the issue?
rkv's avatar
rkv
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5 years ago

Kindly note that we are using Intel P-Tile AVMM IP for PCIe, not Intel P-Tile AVST IP for PCIe.

  • Rahul_S_Intel1's avatar
    Rahul_S_Intel1
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi,

    Kindly note the completion time out is been disabled in stratix 10 , irrespective of Avalon ST or MM

    • rkv's avatar
      rkv
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      5 years ago

      Could you please make it clear? Does 'disabled' means

      1)CTO value can't be changed. If so what's the default CTO value?

      2)Completion Timeout won't happen. So the P-Tile IP for PCIe will wait for the response indefinitely

      • rkv's avatar
        rkv
        Icon for New Contributor rankNew Contributor
        5 years ago

        we are stuck at this point, kindly reply