Forum Discussion
Altera_Forum
Honored Contributor
17 years agoClocked video output
Hello I'm trying to use the Clocked Video Output IP with the SOPC builder I need to output a NTSC (4:3 525 lines) video with separate sync signals. To create the separate sync signals the wiz...
Altera_Forum
Honored Contributor
17 years agohey thiago, thanks alot for your quick reply.
Actualy come to think about it , I said the wrong thing. I have set it to 8 bits, 2 symbols, in sequence and not parallel (hence one symbol per beat i guess ... Is this right). I initial tried 1, but had no luck. Well i get an 8 bit out video data, which i connect to my ADV7171( although the adv has option of using 16 bit interface, i have set it up to use only 8 bits. But I am not sure what to do with the Data Valid signal.DO u leave it unconnected? I am sure the ADV is connected properly and is set right, as i can enable and disable the in build Test pattern generator, plus when download the SOF file onto my fpga the monitor receives a signal, as from Blue screen(standard no signal color) it turns black and if i increase the brightness i get Vertical green lines. Do I need a frame buffer before the Video Clocked out IP. Does it make a difference if i set the Test Gen to produce interlaced frames synced on f0 or f1? I hope u can help me, will greatly appreciate it. regards nadeem