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fa_fpga_enthusiast's avatar
fa_fpga_enthusiast
Icon for Occasional Contributor rankOccasional Contributor
10 months ago
Solved

Clarification on TX/RX P&N Invert feature support in TSE IP core

Hello, Based on the page below from the GTS Transceiver PHY User Guide: Agilex™ 5 FPGAs and SoCs (version 25.1, “Analog Parameter Options” section), the “Enable TX P&N Invert” and “Enable RX P&N Inv...
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  • Sahil_Patni's avatar
    Sahil_Patni
    9 months ago

    Hi,

    Yes,  when you enable the TX/RX P&N Invert options in the TSE IP Analog Parameters GUI, you must also perform the Attribute Access Method steps (as described in GTS Attribute Access Method Example 3) after entering user mode.

    This requirement applies because the TSE IP uses the same underlying PMA attributes as the GTS PHY. The GUI setting alone doesn’t apply the inversion until the attribute access sequence is executed.

    Best Regards,

    Sahil Patni

fa_fpga_enthusiast's avatar
fa_fpga_enthusiast
Icon for Occasional Contributor rankOccasional Contributor
9 months ago

Hello,

Thank you for your detailed reply.

Based on the following documentation:
3.3.11. Analog Parameter Options

When using the Analog Parameter GUI options to invert the PMA P and N pin polarity, it mentions that after entering user mode, the Attribute Access Method steps (as described in the “GTS Attribute Access Method Example 3” section) must be executed.

Could you please clarify if the same requirement applies when the TX/RX P&N invert options are enabled through the Analog Parameters in the TSE IP core?
In other words, is enabling these options in the GUI sufficient for the TSE IP core, or do we also need to perform additional steps similar to those required for the GTS?

Best regards,

Sahil_Patni's avatar
Sahil_Patni
Icon for New Contributor rankNew Contributor
9 months ago

Hi,

Yes,  when you enable the TX/RX P&N Invert options in the TSE IP Analog Parameters GUI, you must also perform the Attribute Access Method steps (as described in GTS Attribute Access Method Example 3) after entering user mode.

This requirement applies because the TSE IP uses the same underlying PMA attributes as the GTS PHY. The GUI setting alone doesn’t apply the inversion until the attribute access sequence is executed.

Best Regards,

Sahil Patni

  • Sahil_Patni's avatar
    Sahil_Patni
    Icon for New Contributor rankNew Contributor
    9 months ago

    Hi,

    I believe all your queries have been addressed.
    If you have no further questions, please mark this thread as Solved for closure.

    If you have a new question, feel free to start a new thread to get support from Altera experts.

    Best regards,
    Sahil Patni

    • fa_fpga_enthusiast's avatar
      fa_fpga_enthusiast
      Icon for Occasional Contributor rankOccasional Contributor
      9 months ago

      Hello,

      Thank you for your reply.

      We will try the proposed solution in the near future.
      If we encounter any issues, we’ll open a new thread.

      This thread can be closed for now.

      Best regards,