Altera_ForumHonored Contributor9 years agoCFI timings Numonyx PC28F00AP30BFA I have a custom board which is based on the FSM shared bus design. where a Cyclone 5 and Max 5 share a 16 bit data and 26 bit address bus and control signals. connected to this bus is a Numonyx PC28F...Show More
Recent DiscussionsCan't generate F-Tile Ethernet Hard IP Design ExampleMAX10 TSE reference designAccessing registers in the PCIE IP beyond MCDMA using system consoleConstraints not being picked for DCFIFOCyclone IV GX project failed migration from 20.1 to 23.1std