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New ContributorCan't simulate alt_dual_boot in ModelSim-Altera (Quartus 19.1)
Hi Armin,
You need to workaround by adding Verilog library above the VHDL library.
In the .do file of your project, add the lpm verilog library. To do this, search for the line that starts with vsim, add "-L lpm_ver" right before all the other libraries (you can see them in the same line as "-L altera -L lpm" etc.)
I hope this helps!
Nurina
Regular ContributorHi Armin,
Are you using NativeLink for the RTL simulation? If not, it seems like the best thing to do is to use NativeLink for your RTL simulation. To do this, go to Tools>Run Simulation>RTL.
Make sure your NativeLink setup is correct. You can follow the steps to do that here: https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/simulation/modelsim/exm-ncsim-native-link.html
Best regards,
Nurina
ArminSchNurina,
yes, I'm using Nativelink for simulation. And, if I just leave out the dual_boot IP, everything runs fine and smooth (except that the dual_boot is not simulated, of course). But I have other IPs included as well (on_chip_flash, int_osc), and they are simulated perfectly fine.
As soon as I include the dual_boot IP the simulation just not starts with the error messages shown.
-armin
