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Knug's avatar
Knug
Icon for Contributor rankContributor
4 years ago

Can I set a weak pull up resistor on an output port ?

Hi, The PFL we are using has a pull-up resistor 10K on the fpga_nconfig line (output from PFL within CPLD MAXV & input to the FPGA) but currently have issues of the fpga-nconfig line driven low som...
NurAiman_M_Intel's avatar
NurAiman_M_Intel
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi Kevin,


Thank you for contacting Intel community.


Apologize for the delay in response as I just received this case today.


Per my understanding from MAX V pin connection guidelines, connect this TMS and TDI input pins to a 10-kΩ pull-up resistor to VCCIO1.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-v/pcg-01012.pdf


The Weak Pull-Up Resistor option should not be used at the same time as the Enable Bus-Hold Circuitry option. This option must be assigned to a pin or it is ignored.


Let me know if this is not the answer you are looking for as what I understand is you wanted to know if weal pull up resistor can be set to output port or not.


Regards,

Aiman