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NGagl
New Contributor
7 years agoCalibration failing for DDR2 Memory Controller on Cyclone V
I'm having trouble implementing the example project generated when instantiating a DDR2 interace on a Cyclone V device on a custom board. At this point, I am trying to create a soft memory interface...
NGagl
New Contributor
7 years agodlim,
Thanks for the confirmation. I omitted this resistor in the initial design but have had our techs try to add it to the board. Its possible that the wiring wasn't quite done right - what kind of failure would you expect without this termination resistor connected to GND?
Also, does changing the current setting for each of the pins alter the termination resistance? I know the default example design sets the memory interface to MAXIMUM CURRENT, but would changing this setting improve the match to the memory device?
Thanks!