Forum Discussion
NGagl
New Contributor
7 years agoCalibration failing for DDR2 Memory Controller on Cyclone V
I'm having trouble implementing the example project generated when instantiating a DDR2 interace on a Cyclone V device on a custom board. At this point, I am trying to create a soft memory interface...
Deshi_Intel
Regular Contributor
7 years agoYes. For Cyclone V DDR2 interface, you need 100ohm termination resistor to GND on oct_rzqin pin.