Forum Discussion
Altera_Forum
Honored Contributor
14 years agocacheable PCIe BAR
Is it possible to make BAR cacheable for PCIe hard macro on Stratix IV attached to standard PC with Intel processor? Anything special needs to be done in the driver for such case? Thanks!
Altera_Forum
Honored Contributor
14 years agoHere's some comments in an old PCI mmap driver routine I wrote. Perhaps this still applies in the latest kernels ...
/* Flags to stop the processor treating PCI memory as
* cacheable (see asm-ppc/pgtable.h)
*
* (thanks to Travis Sawyer from the ppc-embedded list)
*
* I could have used '#ifdef CONFIG_44x', but 40x uses
* these flags too, as do other processors. So just check
* whether the flag exists.
*
* TODO:
* p425 Rubini; use pgprot_noncached()
*
* asm-ppc/pgtable.h defines it as setting these two flags
*
* So, that appears to be the 'portable' way to do it.
*
* drivers/char/mem.c uses pgprot_noncached()
*/# ifdef pgprot_noncached
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);# endif
Cheers, Dave